The graphical solutions S3 graphics usually find it place in the integrated chipsets of the allied company VIA.
Associates shared with community news, as always about the extensive plan of S3 Graphics. In its time after foregoing the idea to release graphical solutions with the support Of directX 9.0c, this company decided immediately to turn to the release of products with the support Of directX 10 and DirectX 10.1.
The first card with the support Of directX 10 must appear on the market after only nine months, prototypes are supplied now. Chips XD2 and D2 are produced on 0.09 m technical process, they support HDMI, Dual-Link DVI, LVDS and HDTV, and also the hardware decoding of the video formats , placed to HD-DVD and Blu-Ray. Chips have three actuating units; however, separation into scalar units is not described.
The frequency of chips XD2 and D2 reaches 1 GHz, and this is also peculiar record. The organization of access to the memory depends on the belonging chip with the the price class. For XD2 it provide the four-channel 128- bit memory controller, for the cheaper chip D2 it provide the two-channel 64- bit memory controller. Are supported the types of memory DDR-2, GDDR- E and GDDR-4, in this case the design of the printed-circuit board will be sufficiently simple and energetically economical.
Chips XD3 and D3 will become first 0.065 m to the graphical solutions, released by company TSMC. The deliveries of samples must begun through half of year, when technical process reaches the proper degree of maturity. The frequency of chips will reach 1.2 GHz, and the controller of memory will be simpler - two channels on 128 or 64 bits.
In 2008, already in its first half, can appear the graphical solutions S3 with the support Of directX 10.1. They all will be made with the utilization of 0.065 m technical process, and they will support the interface PCI express 2.0.
Most powerful will be the series of chips XE1/E1. They will consist of eight cores, support GDDR- E, GDDR-4 and GDDR- SHCH. The system bus of memory will be 512- bit and four-channel for XE1, 256- bit and four-channel for E1.
The series of chips XE2/E2 will possess the modest characteristics: five cores, the four-channel controller of memory with the 256- bit (XE2) or 128- bit (E2) system bus.
XE3/E3 is limited to two cores and two-channel 128- bit controller of memory. The ability to work with GDDR- E, GDDR-4 and GDDR- SHCH in this case is retained.
As we can be convinced, polynuclear layout with the creation of video chip will be taken to the armament by not only company AMD (R700), but also by the company S3 graphics. Idea is not new, and under the up-to-date conditions is completely viable. remain only to observe, will suffice in VIA/S3 forces to realize that planned in practice.